1. Field of the Invention
The present invention relates to a method for controlling, programming, and reading operations of a memory device, and more particularly, to a method for programming and reading a plurality of one-time programmable (OTP) memory blocks so as to simulate updateable ability as a multi-time programmable (MTP) memory.
2. Description of the Prior Art
Because of the non-volatile characteristic of non-volatile memory, non-volatile memory has been applied in various electrical products, such as digital cameras, mobile phones, video game consoles, and personal digital assistants. Generally speaking, some memory devices, such as hard disk drives, flash memory, and one-time programmable (OTP) memory, can be classified as non-volatile memories because data stored in these devices is not lost when power is shutdown. Flash memory and OTP memory are two kinds of non-volatile memory that are more popular. Flash memory and OTP memory respectively control a threshold voltage of their memory cells to store binary data such as xe2x80x9c0xe2x80x9d or xe2x80x9c1xe2x80x9d. The main difference between flash memory and OTP memory is that data stored in flash memory can be updated and OTP memory is one-time programmable. Once data Is written into a memory cell of OTP memory, it is impossible to update the data stored in the memory cell.
Please refer to FIG. 1, which is a structure diagram of a flash memory cell 10. The flash memory cell 10 comprises a substrate 12, a source 14, a drain 16, a floating gate 18, and a control gate 20. The control gate 20, source 14, and drain 16 have voltages Vcg, Vs, and Vd respectively. An oxide layer 24 is formed between a channel 22 and the floating gate 18. The substrate 12 is connected to a reference voltage (normally 0V). If the substrate 12 is P-doped, then the source 14 and the drain 16 are both N-doped. If the substrate 12 is N-doped, then the source 14 and the drain 16 are both P-doped. Data stored in the flash memory cell 10 is determined by electrons stored in the floating gate 18 because the electrons stored in the floating gate 18 will change the corresponding threshold voltage of the flash memory cell 10. A lower threshold voltage of the flash memory cell 10 corresponds to fewer electrons in the floating gate 18 and corresponds to a binary numberxe2x80x9c1xe2x80x9d. And a higher threshold voltage of the flash memory cell 10 corresponds to more electrons in the floating gate 18 and corresponds to a binary numberxe2x80x9c0xe2x80x9d.
Before writing data into the flash memory cell 10, the flash memory cell 10 must be erased. Currently, the most well-known and commonly used flash memory erasing method is called Fowler-Nordheim tunneling (FN tunneling). FN tunneling is mentioned in many documents, such as U.S. Pat. No. 5,642,311 xe2x80x9cOvererase correction for flash memory which limits overerase and prevents erase verify errorsxe2x80x9d. When an erasing procedure Is performed on the flash memory cell 10, a voltage pulse is continually applied to the flash memory cell 10. The erasing voltage pulse generates an electromotive force (EMF) with a negative potential difference between the control gate 20 and the drain 16 of the flash memory cell 10. For example, when an erasing voltage pulse is applied to the flash memory cell 10, the voltage of the control gate 20 is 10 volts, and the voltage of the source 14 is +5.5 volts. With the above erasing procedure, electrons accumulated in the floating gate 18 of the flash memory cell 10 are reduced because the electrons pass through a thin dielectric layer of the flash memory cell 10 to cause a reduction of the threshold voltage of the flash memory cell 10.
Because flash memory Is updateable, flash memory can be classified as multi-time programmable (MTP) memory. In order to operate properly, MTP memory must comprise specific circuits for erasing, programming, and reading operations. Unlike MTP memory, OTP memory comprises circuits for programming and reading operations without comprising erasing circuit, so the circuit for controlling the operations of OTP memory is simpler than the circuit for controlling the operations of MTP memory. In addition, the manufacturing processes of MTP memory are more complex than the manufacturing processes of OTP memory, so MTP memory usually has higher cost than OTP memory. Moreover, OTP memory is one-time programmable so that the usage of OTP, memory is limited.
It is therefore a primary objective of the claimed invention to provide a method for controlling reading and programming operations of a plurality of OTP memory blocks of a memory device to simulate the updateable ability of MTP memory.
The memory device comprises a plurality of one-time programmable (OTP) memory blocks, a record element for recording status of the OTP memory blocks, and a control circuit electrically connected to the OTP memory blocks for controlling programming and reading operations of the OTP memory blocks. Each of the OTP memory blocks comprises a plurality of OTP memory cells. Each of the OTP memory cells is used to store one bit data.
The method comprises (a) selecting an un-programmed OTP memory block from the OTP memory blocks according to the status of the OTP memory blocks recorded in the memory element; (b) programming the selected OTP memory block; and (c) updating the status of the OTP memory blocks recorded in the memory element so as to record that the selected OTP memory block is programmed.